Architecture and method for the centralised control of remote peripheral electronic devices

ABSTRACT

Architecture and method for the centralised control of events occurring in correspondence with remote peripheral electronic devices, in particular wireless devices, provided with radio units which are periodically turned on and turned off in order to limit electric power consumption to a minimum, said architecture and said method allowing for the synchronised bi-directional transmission of information between said peripheral devices and a central device.

BACKGROUND

A. Field

The invention relates to an architecture and a method for thecentralised control of events occurring in correspondence with remoteperipheral electronic devices.

More specifically, the invention concerns an architecture and a methodfor the centralised control, of the kind suitable to be employed in allthose situations in which a remote control is required for peripheraldevices that hardly accessible for example due to their distance ortheir large number, by means of a central device.

B. Related Art

The invention can be advantageously employed, for instance in the fieldsof security, of anti-theft systems, and of the remote control ofenvironmental parameters, such as temperature, humidity, pressure, etc.,by means of remote sensors.

It is known that architectures where one or more peripheral electronicdevices are able to continuously transmit information to a centraldevice are currently employed. for the centralised control of eventsoccurring in correspondence with remote peripheral electronic devices.

The information transmission from the peripheral to the central devicetakes place by means of a transmitting unit provided in the peripheraldevice, through cables, optical fibres, infrared rays, laser, etc., or,preferably, radio waves.

In particular applications, where the peripheral devices are located inareas where no power supply is available, devices autonomously suppliedby batteries or accumulators are employed. In such conditions, i.e. whenthe peripheral devices are battery supplied, and anyway in everysituation where it is desirable to minimise current consumption incorrespondence with peripheral devices, for example in the case whenthese devices are very large in number, architectures where the radiounit with which the peripheral devices are equipped is intermittentlysupplied were developed in the past.

As well known, indeed, in the peripheral devices the receiving andtransmitting units absorb most of the electric power supplied by thebatteries and, consequently, remarkable savings can be achieved byalternating turn-on and turn-off phases of these units, with anoutstanding increase in batteries life.

Another reason for reducing to a minimum the turn-on time slots of theradio unit, in particular of the transmitting unit, lies in the factthat the rules currently in force for the utilisation of the frequenciesemployed in many applications, for example in the field of remotecontrol, security, etc., allow bus occupancy only for short time slots.

WO 01/26069 discloses, for instance, a peripheral device where a sensor,provided with a transmitting and receiving unit, is periodicallysupplied for receiving a synchronisation signal from the base stationand for transmitting in its turn a flow of information. If the basestation receives the flow of information from the peripheral device, itsends a confirmation to the peripheral devices, which can consequentlydeactivate the supply to the sensor.

Nevertheless, an architecture based on the principle disclosed in theabove mentioned WO 01/26069 does not allow to modify the operationparameters of the peripheral device. In other words, the peripheraldevice, once programmed, cannot undergo further remote modifications ofits operation parameters, such as the turn-on, turn-off time slots ofthe sensor, without directly intervening on the device.

This arises from the fact that the autonomous transmission of flows ofinformation from the central devices to the peripheral ones is notenvisaged, but only the transmission of confirmation signals of thereception is provided.

In other words, the receiving unit provided in the peripheral devices,though allowing a bi-directional exchange of data, is intended only toreceive a confirmation signal.

The need for a direct intervention on the peripheral device in order toperform its programming involves remarkable drawbacks and limitations,in particular in open-field applications, where the peripheral devicesare placed at a large distance from one another and they are large innumber.

Furthermore, the prior art architectures do not envisage the possibilityof providing devices, either peripheral or central, exclusively suppliedby battery and consequently provided with receiving and transmittingunits that are periodically turned off.

BRIEF SUMMARY OF PREFERRED EMBODIMENT OF THE INVENTION

An object of the present invention is, therefore, to provide anarchitecture and a method for its operation which allow to manageperipheral devices by means of a central device, in the case when saidperipheral devices are provided with receiving and transmitting unitsthe supply of which is periodically interrupted.

Another object of the present invention is to provide an architectureand a method which allow to manage peripheral devices by means of acentral device, in the case when both said peripheral devices and saidcentral device are provided with receiving and transmitting units thesupply of which is periodically interrupted.

These and other objects of the present invention are achieved by thearchitecture and the method according to the appended claims.

In many applications, particularly in wireless applications, it isstrictly necessary to minimise consumption. In a mono-directionalsystem, in which the peripheral devices are equipped with a transmittingunit only, this result is achieved by limiting transmissions to aminimum, without knowing for sure whether the signalling of an event hasbeen correctly received by the central device. In a bi-directionalarchitecture like the one of the present invention, which is able toassure transmission reception thanks to confirmation strings, theproblem arises of supplying the radio apparatus of the peripheraldevices also for the reception of programming, configuration data andstate settings, as well as of confirmation strings.

Advantageously, according to the invention, the peripheral devices canbe managed by means of the central device without the need for localintervention on them.

The receiving and transmitting units of the peripheral devices, beingonly periodically supplied, will show a low electric power consumption.

Moreover, also the central unit could be supplied by battery andenvisage phases in which the receiving and transmitting units are turnedoff, with a consequent outstanding increase in batteries life.

DESCRIPTION OF THE DRAWINGS

The present invention will now be more specifically described byreference to the attached drawings, wherein:

FIG. 1A is a block diagram of the architecture according to a firstembodiment of the invention;

FIG. 1B is a block diagram of the architecture according to a secondembodiment of the invention;

FIG. 2A is a block diagram of a peripheral/central device according tothe first embodiment of the invention;

FIG. 2B is a block diagram of a central device according to the secondembodiment of the invention;

FIG. 3 is a state diagram of the peripheral devices and of the centraldevice when non-continuously supplied;

FIG. 4 shows the synchronisation protocol between a peripheral deviceand the central one;

FIG. 5 shows the data transmission protocol from a peripheral device tothe central device;

FIG. 6 shows the data transmission protocol from the central device to aperipheral device;

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION

With reference to FIG. 1 a, the architecture according to a firstembodiment of the present invention is schematically explained, whichprovides a plurality of peripheral devices 11 a, 11 b, . . . , 11 n anda central device 111.

According to this preferred embodiment of the invention, the peripheraldevices 11 a, 11 b, . . . 11 n are wireless devices, that is they haveno wire connections, are supplied by batteries 13 and communicate byradio waves through antennas 19.

Similarly, the central device 111 is equipped with an antenna 119 forcommunicating with the peripheral devices 11 a, 11 b, . . . 11 n and issupplied by a battery 113.

Referring now to FIG. 2A, the reference numerals of the components ofthe peripherals devices as well as those (in brackets) of the componentsof the central device are indicated.

The peripheral devices 11 a, 11 b, . . . 11 n (generically indicated bynumeral 11) which, as anticipated above, are supplied by a battery 13,communicate from and to the outside by integrated transmitting 15 andreceiving 17 radio units, connected to the antenna 19.

Moreover, said peripheral devices 11 a, 11 b, . . . 11 n are providedwith means 21 for generating a local timing signal CLK_(loc) by whichthe turn-on and the turn-off of said radio units 15, 17 are periodicallycontrolled.

Said peripheral devices are further provided with a processing unit orCPU 23, which is equipped with storage means 25, either integrated orexternal, and, optionally, with an I/O gate 27.

Still with reference to FIG. 2A, in this embodiment, the central device111, which has substantially the same structure as the peripheraldevices, is supplied by a battery 113 and communicates from and to theoutside by means of a transmitting 115 and receiving 117 radio unit,which are integrated and equipped with an antenna 119.

The central device 111 is further provided with a processing unit or CPU123, which is equipped with storage means 125, either integrated orexternal.

The operation of the peripheral devices according to the invention willnow be more specifically described.

In the peripheral devices 11 a, 11 b, . . . 11 n, the control of thetransmitting 15 and receiving 17 unit and of the flow of data from andto the outside is committed to the CPU processing unit 23; moreover, theCPU processing unit 23 manages I/O peripheral devices, if any. Inperforming out these tasks, the CPU 23 utilises the information and theprogram steps stored in the storage unit 25.

Said storage unit 25 contains also the operation information andparameters of the peripheral device, such as the time length of the “on”and “off” states of the radio units.

According to the invention, the transmitting 15 and receiving 17 radiounit is controlled by the CPU 23 through the following control signals:

Wake: impose the (ON/OFF) state to the radio unit 15,17;

PTT (Push to Talk): impose the transmitting state to the radio unit15,17;

TXD: data transmitted by the CPU 23;

RXD: data received by the CPU 23;

RSSI: signal indicating the level of the received radio signal.

With reference to FIG. 3, the state of minimal consumption (“sleepingstate”) in correspondence with the peripheral devices 11 a, 11 b, . . .11 n is achieved by imposing the off state to the transmitting 15 andreceiving 17 radio units. In this way, i.e. when in off state, theperipheral device can neither transmit nor receive and the CPU 23 justperforms the minimal functions of management of the I/O gates, if any.

Thus, the peripheral device is in the sleeping state.

When the CPU switches over the receiving unit 17 to the ON state(“passive state”), where the peripheral device can receive, but cannottransmit, the electric power consumption rises and the CPU enables thereception and the subsequent processing of data that may come from thereceiving unit 17.

When the CPU switches over the transmitting unit 15 to the ON state(“active state”), where said unit 15 can transmit and the CPU 23 enablesthe transmission of data that may be directed to the transmitting unit15, the electric power consumption rises further.

The transition from the “sleeping state” to the “passive state” and“active state” is determined by the local timing signal CLK_(loc) and/orby events internal or external to the peripheral device.

In this first embodiment, since the central device 111 is supplied bybatteries, it should alternate activity and inactivity phases of theradio unit, in order to reduce consumption to a minimum.

Still with reference to FIG. 3, the main machine states common to theperipheral devices and the central device, as well as the events thatcan alter said states, are disclosed.

S Timeout switches the machine state from the “sleeping state” to the“passive state”, where the peripheral/central device is able to receivethrough the receiving radio unit 17;

P Timeout switches the machine state to the “sleeping state”, where boththe transmitting 15 and receiving 17 units are turned off;

Tx Req switches the machine state to the “active state” and coincideswith the transmission requests due to either external events (variationon the I/O gates) or internal events (answers to received data orinformation produced at predetermined time);

Tx End switches the machine state from the “active state” to the“passive state” and coincides with the end of the transmission.

Only the peripheral devices 11 a, 11 b, . . . 11 n have also a “syncstate”, i.e. a time synchrony state where they synchronise with thecentral device or with a network timing device, if the latter isseparated from the central device.

When the peripheral devices are synchronised, they simultaneously switchto the “passive state”. If any of the peripheral devices transmits inthis time window, the others are able to receive.

It is evident that the synchrony between the different devices gets aremarkable significance for an effective operation of the architecture,since it allows for both the possibility of bi-directional operation,and consequently the information flow from and to the peripheraldevices, and maximum consumption reduction.

With reference to FIG. 4, the synchronisation procedure of theperipheral devices is disclosed, wherein:

REQ_SYNC: is the synchronisation request, emitted by the peripheraldevice that is out of synchrony (generally emitted only once when theperipheral device is turned on for the first time, or when theperipheral device has not received confirmation of the correct receptionof transmitted data, which is an indication of lack of synchrony withthe central device);

SYNC: is the answer to the synchronisation request REQ_SYNC, emitted bythe central device;

DATA: is a generic string of data;

ACK: is a confirmation string.

Still with reference to FIG. 4, a synchronisation session is disclosed,followed by the transmission of a data string, between a peripheraldevice and a central one. In FIG. 4 and in the following Figures, onlythe “sleeping states” and the “passive states” are indicated, as the“active sates” are implicitly associated to every data transmission fromthe peripheral or central device.

In FIG. 4, “t” indicates the media transfer time, intended as timeoverhead due to serialisation and protocol delays. Since “t” is knownand/or can be calculated, it is possible to set up the length of theON/OFF states of the peripheral and central devices (that is when theyswitch to the “passive state”) in order to preserve synchronisation.

The peripheral device which is out of synchrony switches to the “activestate” and repeatedly sends the synchronisation request REQ_SYNCalternating “active states” and passive states” till the central device,which meanwhile has moved to the “passive state”, is able to interceptsaid request.

The central device, once it has received the request REQ_SYNC, switchesto the “active state” and sends the synchronisation string SYNC, whichcan be received by the peripheral device that has sent the request.

The peripheral device that has received the synchronisation string SYNCis therefore able to synchronise its clock with the one of the centraldevice. This is done by the CPU 23 aboard the peripheral device.

On performing synchronisation with the time base of the central device,the peripheral device must consider the media transfer times “t” and thetime “T” between the beginning of the “passive state” in the centraldevice and the sending of the string SYNC from said device; the time “t”is calculated by the peripheral device on the basis of the delay of theanswer received from the central device, while the time “T” is containedin the synchronisation string sent by the central device.

Thus, the peripheral device, which is now synchronised, can switch tothe “active state” and transmit a data string DATA exactly in the timeslot when the central device is in the “passive state” and,consequently, is able to receive said string.

The time window during which the central device is in “passive state”and, consequently, is able to listen to the peripheral device is openedat regular intervals and has a length which is dynamically variabledepending on the amount of received data.

Once the central device has received the data string, it switches to the“active state” and sends a confirmation string ACK, which is received bythe peripheral device.

The synchronisation procedure gets a special significance, for thesystem operation, since it allows for:

-   -   the possibility of bi-directional operation and consequently the        information flow from and to the peripheral devices;    -   the minimisation of the consumption levels of the equipment.

With reference to FIG. 5, the transmission procedure of a generic datastring DATA between a peripheral device and a central device isdisclosed, the peripheral device being already synchronised with thecentral one.

The peripheral device, which is in “active state”, sends a data stringDATA that is received by the central device 11, which is in “passivestate”, with a delay depending upon the media and upon collision errorsthat may occur. The central device 111, once it has received the datastring DATA, confirms reception by sending a string ACK and, once theperipheral device has received said string, it switches to the “sleepingstate”.

If the peripheral device does not receive the string ACK in apredetermined time, it will recognise the state of non-synchrony withthe central device and the CPU of the peripheral device will perform thesynchronisation loop previously disclosed.

It is to be noted that the string ACK preferably contains also theinformation of synchronisation SYNC, so that the correct synchronisationof the peripheral device with the network time base 121, which ispreferably integrated in the central device 111, is restored.

With reference to FIG. 6, the transmission procedure of a generic datastring DATA between a central device 111 and a peripheral device 11 isdisclosed, the peripheral device 11 being already synchronised with thecentral one.

The central device 111, which is in “active state”, sends a string DATAthat is received by the peripheral device 11, which is in “passivestate”, with a delay depending upon the media and upon collision errorsthat may occur. The peripheral device 11, once it has received thestring DATA, confirms reception by sending a string ACK and, once thecentral device has received said string, the central device and theperipheral one switch to the “sleeping state”.

With reference to FIG. 1B, the architecture according to a secondembodiment of the present invention is schematically disclosed, saidarchitecture involving a plurality of peripheral devices 11 a, 11 b, . .. 11 n supplied by battery, like in the first embodiment, but with acentral device supplied by the public electric power network.

According to this second embodiment, while the wireless peripheraldevices 11 a, 11 b, . . . 11 n provide for the turn-on and turn-off ofthe transmitting 15 and receiving 17 radio unit, the central device 111does not provide for the turn-off of the receiving unit 117, whichconsequently is always available for receiving an information flow fromthe peripheral devices.

Referring again to FIG. 4, a synchronisation session according to afurther embodiment of the invention is disclosed, where the peripheraldevices 11 a, 11 b, . . . 11 n, and the central device 111 are able tocommunicate at various frequencies, for example, f₁, f₂, . . . f₁₀,which vary according to a sequence fixed by an algorithm common to allthe devices, both peripheral and central. For each device, eitherperipheral or central, the frequency in use at time t will be determinedsolely on the basis of the frequency in use at the preceding time t−1,according to the relation f_(t)=F(t−1). This measure, known as frequencyhopping, has the advantage of increasing the security of the radiotransmissions inside the system on one part and of limiting theoccupancy of any single frequency on the other part, according to theprescriptions of the certification rules, yet maintaining thepossibility of transmitting for a much longer time.

The synchronisation of the peripheral devices with the central one takesplace as follows.

A peripheral device 11 a, 11 b, . . . 11 n repeatedly transmitssynchronisation requests at a predetermined frequency rf, chosen fromthe group of available frequencies and defined as Recovery Frequency,for example rf=f₇, where f₇ is one of ten different frequencies used bythe system.

The synchronisation request at frequency rf is received by the centraldevice 111, which periodically opens a listening window on the channelrf, preferably at the end of each passive state.

Once it has received the synchronisation request, the central device 111transmits a synchronisation string SYNC, which, once received by theperipheral device, enables said device to synchronise with the centraldevice. 111. At the end of this stage, the peripheral device can startthe transmission of the data string DATA on one or more frequencies f₁,. . . f₁₀, exactly during the opening of the listening window of thecentral device, when said device is in passive state.

At the end of the reception of the string DATA, the central device 111transmits a confirmation string ACK, upon reception of which theperipheral device switches to the “sleeping state”.

It is to be noted that in the synchronisation procedure according tothis embodiment of the invention, the synchronisation is carried out forthe opening times of the reception and transmission windows, as well asfor the sequence of the employed frequencies, so that the differentdevices, both peripheral and central, are able to talk to one anotherand to be listened to.

The transmission protocol between the peripheral devices and the centralone, and vice versa, is of the CSMA (Carrier Sense Multiple Access)type, since possible collisions (simultaneous transmissions) may cause,in general, deterioration of the sent data. Thus, each device carriesout transmission attempts until the reception of a confirmation stringfrom the receiver.

Each device randomly shifts, within the limits of an established timewindow, the time when it switches from the “passive state” to the“active state”, thus reducing the chances of collision and of possiblesuccessive collisions.

The protocol involves operating strings (such as, for example,synchronisation requests, confirmation strings, network parameterstransfer, etc.) and data string, by means of which the stateinformation, events and application commands are transferred.

-   The strings, independently from their kind and function, contain the    following fields:-   1. Header: it contains the information on the structure of the    string itself;-   2. Auxiliary control fields;-   3. Variant field;-   4. Source and destination addresses;-   5. Length;-   6. Data field;-   7. Control field (CRC);-   8. Auto-correction field (for example Reed-Solomon code).

Furthermore, the fields (2) to (7) are preferably ciphered by means of asymmetric algorithm, for example by FEALnX algorithm (64 bitblock-cipher), used in CBC (Cipher Block Chaining) mode, and/or withpublic key.

For the correct operation of the architecture, the fields (1), (4), (5),(6) and (7) are necessary and sufficient, the fields (2), (3) and (8)depending on the application kind and/or to the implementation modes.

The disclosed architecture can be specially applied in all thosesituations where there is a small traffic of data between the differentdevices (such as, for example, security systems or wirelessenvironmental monitoring systems), but where, at the same time,bi-directional information flows and low consumption are required.

Moreover, the above disclosed architecture allows to reduce to a minimumthe impact on consumption of the bi-directionality of the informationflow, within a network of battery supplied equipment, working at a setfrequency, or, alternatively, to operate at several frequencies (in alimited set).

In this respect, it will be possible to program peripheral devices forcontrolling, through the optional I/O gates previously disclosed, theperiodical turn-on and turn-off of connected equipment, if any, thusachieving further energy saving.

The architecture and method disclosed were advantageously implemented inlaboratory, in a wireless security system comprising the followingdevices:

-   -   a central device, equipped with a keyboard, a graphic display        and a telephone interface;    -   64 passive infrared IR proximity sensors;    -   5 sirens;    -   8 electromechanical actuators.

All the devices were supplied by lithium primary batteries and, thanksto the operation modes according to the invention, an endurancetypically no lower than 2,5 years in standard conditions of use wasestimated, against an endurance of few weeks in a conventional system.

Even if the invention has been disclosed with reference to a wirelessradio waves transmission system, it is nevertheless possible to envisageto employ the same architecture in wired systems or in systems usingother transmission means, such as laser or infrared rays.

1. Architecture for the centralised control of events occurring incorrespondence with remote peripheral electronic devices, comprising: atleast one electronic central device (111), said electronic centraldevice including a processing unit or CPU (123), a transmitting unit(115), a receiving unit (117) and a power supply unit (114); at least adevice (121) for generating a network timing signal; at least oneelectronic peripheral device (11 a, 11 b, . . . 11 n), said peripheraldevice being provided with a processing unit or CPU (23), a storage unit(25), a transmitting unit (15), a receiving unit (17), a device (21) forgenerating a local timing signal, a battery (13) and means forperiodically interrupting and activating the electronic power supply tothis transmitting and/or receiving unit, wherein said at least oneperipheral device (11 a, 11 b, . . . 11 n) is programmable by means of aflow of data autonomously output from said central device and receivedby said at least one peripheral device; wherein said peripheral device(11 a, 11 b, . . . 11 n) is configured to switch over said transmittingand receiving units according to the following machine states: “sleepingstate,” wherein the transmitting and receiving units are not suppliedwith power; “passive state,” wherein the receiving unit is supplied withpower and the transmitting unit is not supplied with power; “activestate,” wherein both the transmitting and receiving units are suppliedwith power, and wherein said peripheral device comprises means forimposing to said peripheral device a “sync state” where a clock of saidperipheral device synchronises by means of a synchronization protocolwith said network timing device, when the peripheral device has notreceived confirmation of the correct reception of transmitted data tothe central device, said lack of confirmation being an indication oflack of synchrony with the central device.
 2. Architecture according toclaim 1, wherein means are provided for enabling the autonomous transferto said peripheral device from said central device (111) of a flow ofinformation which is received by said receiving unit (17) in saidperipheral device (11 a, 11 b, . . . 11 n), said means for enabling theautonomous transfer of a flow of information including a synchronisationloop of turn-on and turn-off slots of the transmitting/receiving units(15, 17) of said peripheral device with respect to the network timingsignal and a data transfer loop from said central device (111) to saidperipheral device (11 a, 11 b, . . . 11 n).
 3. Architecture according toclaim 2, wherein said central device (111) and/or said peripheral device(11 a, 11 b, . . . 11 n) periodically switches from the “sleeping state”to the “passive state”, the frequency of said switching being determinedby a local timing signal and the time length of said “passive state”being determined by said local timing signal and by the reception ofdata flows by the receiving unit (17).
 4. Architecture according toclaim 3, wherein said central device and/or said peripheral deviceperiodically switches from the “passive state” to the “active state” andvice versa, the frequency of said switching being determined by theoccurrence of an event occurring in correspondence with said centraland/or peripheral device and requiring to be transmitted. 5.Architecture according to claim 2, wherein said supply unit of saidcentral device includes a power supply connected to a public or privateelectric power supply network.
 6. Architecture according to claim 1,wherein said peripheral device is a wireless device and wherein saidtransmitting unit and said receiving unit are a transmitting radio unitand a receiving radio unit, respectively.
 7. Architecture according toclaim 6, wherein said receiving and transmitting radio units are causedto communicate to each other at varying frequencies belonging to a groupof predetermined frequencies chosen according to a sequence which ispredetermined and common to all devices, and wherein saidsynchronisation loop is carried out by utilising always the samerecovery frequency (rf) from this group of frequencies.
 8. Architectureaccording to claim 1, wherein said supply unit of said central deviceand/or of said peripheral device includes a battery.
 9. Architectureaccording to claim 1, wherein said device for generating a networktiming signal is integrated in said central device.
 10. Architectureaccording to claim 1, wherein said peripheral device is a sensor of ananti-theft or anti-fire system and wherein said central device is thecontrol unit of said system.
 11. Method for the centralised control, bymeans of at least one electronic central device provided with aprocessing unit or CPU (123), a transmitting unit (115), a receivingunit (117), a supply unit (114) and by means of a device (121) forgenerating a network timing signal, of events occurring incorrespondence with remote peripheral electronic devices provided with aprocessing unit or CPU (23), a storage unit (25), a transmitting unit(15), a receiving unit (17), a device (21) for generating a local timingsignal, a battery (13) and means for periodically interrupting andactivating the electric power supply to this transmitting and/orreceiving unit, comprising programming during a phase said at least oneperipheral device (11 a, 11 b, . . . 11 n) by means of a flow of dataautonomously output from said central device and received by saidperipheral device; wherein said peripheral device (11 a, 11 b, . . . 11n) is operable according to the following machine states: “sleepingstate,” wherein the transmitting and receiving units are not suppliedwith power; “passive state,” wherein the receiving unit is supplied withpower and the transmitting unit is not supplied with power; “activestate,” wherein both the transmitting and receiving units are suppliedwith power; and wherein said method comprises the steps of: imposing tosaid peripheral device a “sync state” where a clock of said peripheraldevice synchronises by means of a synchronization protocol with saidnetwork timing device; and wherein said “sync state” is imposed when theperipheral device has not received confirmation of the correct receptionof transmitted data to the central device, said lack of confirmationbeing an indication of lack of synchrony with the central device. 12.Method according to claim 11, wherein said peripheral device isprogrammed by means of a first phase of synchronisation of turn-on andturn-off slots of the radio units of said peripheral device with thenetwork timing signal and a second phase during which the data aretransferred from said central device to said peripheral device. 13.Method according to claim 12, wherein said synchronisation phasecomprises sending, by the peripheral device which is out of synchrony,of a synchronisation request (REQ SYNC), said request being repeatedtill the reception, by said peripheral device, of an answer (SYNC)emitted by the network timing device.
 14. Method according to claim 13,wherein said data flow (DATA) for the programming of said peripheraldevice is transmitted by said central device when said peripheral deviceis in “passive state”, said peripheral device moving to “active state”at the end of the reception of said data flow, thereby enablingtransmittal of a confirmation string (ACK) to said central device. 15.Method according to claim 12, wherein said synchronisation phasecomprises sending, by the peripheral device which is out of synchrony,of a synchronisation request (REQ SYNC), said request being alwaysrepeated at the same recovery frequency (rf), chosen from a group offrequencies (f₁, f₂, . . . f_(n)) at which said peripheral devices andsaid central device operate for the data transmission and reception. 16.Method according to claim 11, wherein the transmission protocol from theperipheral devices to the central device and vice versa is of the CSMA(Carrier Sense Multiple Access) type and includes at least a “Header”field, containing the information about the structure of the stringitself, a field containing the source and destination addresses, a fieldcontaining the string length, a field containing the data and a controlfield (CRC).
 17. Method according to claim 16, wherein said transmissionprotocol further includes at least an auxiliary control field, a variantfield and an auto-correction field.
 18. Method according to claim 17,wherein said auto-correction field is coded according to theReed-Solomon code.
 19. Method according to claim 16, wherein at leastone of said fields is ciphered by means of a symmetric algorithm. 20.Method according to claim 11, wherein said synchronization protocolcomprises the steps of: switching said peripheral device to said “activestate;” repeatedly sending a synchronization request (REQ_SYNC)alternating “active states” and “passive states” till the central deviceis able to intercept said request; once it has received the request(REQ_SYNC), switching said central device to the “active state” andsending a synchronization string (SYNC) to the peripheral device thathas sent the request; receiving said synchronization string (SYNC) insaid peripheral device; synchronizing the clock of said peripheraldevice with the one of the central device.
 21. Method according to claim20, wherein once the central device has received a data string, itswitches to the “active state” and sends a confirmation string ACK tothe peripheral device and wherein said string ACK contains also theinformation of synchronization (SYNC), so that the correctsynchronization of the peripheral device with the network time base(121) is maintained.
 22. Method according to claim 21, wherein the timewindow during which the central device is in “passive state” and,consequently, is able to listen to the peripheral device is opened atregular intervals and has a length which is dynamically variabledepending on the amount of received data.